Naga Chandrasekaran is senior vice president of technology development at Micron Technology. Dr. Chandrasekaran leads Micron’s global technology development and engineering efforts related to the scaling of current memory technologies, advanced packaging technology, as well as investigating emerging memory technology solutions to support Micron’s future requirements. He also manages mask technology development, corporate characterization labs, advanced modeling and data analytics, and R&D fabrication operations at Micron’s headquarters in Boise, Idaho. He was appointed to his current position in 2019.
In 2001, Dr. Chandrasekaran joined Micron as a CMP development engineer and since then has held a series of positions of increasing responsibility in process and equipment development across multiple R&D process areas, leading manufacturing and technology transfer efforts, integration of new business units, and development of solar, LED and display technology. From 2007 to 2008, he also served as fab engineering manager for IM Flash, Singapore Operations. He most recently served as senior vice president of process research and technology development.
Dr. Chandrasekaran has authored several keynote publications and patents, and he has served as an invited panel speaker at several conferences. He has also received several awards, including Jiri Tlusty Outstanding Young Manufacturing Engineer of the Year, awarded by the Society of Manufacturing Engineers in 2003, and Engineering Manager of the Year, awarded by the American Society of Engineering Management (ASEM) in 2018.
Dr. Chandrasekaran earned a bachelor’s degree in mechanical engineering from the University of Madras. He earned both a master’s and a doctorate degree in mechanical engineering from Oklahoma State University and dual executive MBAs from the University of California, Los Angeles (UCLA-Anderson School of Management) and the National University of Singapore.
A memory and storage hierarchy evolution is unfolding before us. Homogenous data centers that met our needs in the past, will not meet our future needs. We must look to heterogenous solutions that require an expansion of the current memory hierarchy, and ultimately, a convergence of memory and storage. Conventional scaling must continue, while disruptive 3D, and other advanced solutions will emerge to move us into the next few decades of memory advancement. Advanced Packaging solutions will play a critical role in this expanded hierarchy, but to achieve this monumental shift, the collaboration, knowledge-sharing, and innovation our industry has relied on to extend Moore’s Law over the past decade must now push the boundaries, to move the packaging supply chain to a front-end like model. At the same time, we must keep focus on more sustainable and cost-effective solutions while building a strong talent-based workforce to support long-term growth. We face many near-term challenges to enable this new ecosystem, but if successful, our industry will emerge with a longer-term roadmap that impacts and enriches lives for generations to come.