Ramin

Farjadrad

Eliyan

Co-Founder & CEO

Ramin Farjad is the founding CEO of Eliyan, a company focused on next generation chiplet-based system-in-package (SiP) solutions. He was previously the CTO/VP Networking/Automotive PHYs at Marvell, in charge of developing connectivity technologies for autonomous vehicles, hyperscale data centers, and heterogenous SiP Integration. Before that, he was Co-Founder/VP Technology of Aquantia, where he focused on Ethernet PHY technologies. Ramin has pioneered several signaling schemes adopted as international standards, such as PAM4 SerDes (IEEE 802.3cd), Multi-Gig Automotive Ethernet (IEEE 802.3ch), Enterprise Ethernet (IEEE 802.3bz), and the BoW die-to-die connectivity scheme at OCP. He is the author of over 140 granted/pending patents. He earned a PhD in electrical engineering from Stanford University.

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Mix and Matching Chiplets with the Economics of PCB Design

Industry has been looking for ways to implement high-performance system in package (SiP) solutions by mixing and matching existing off-the-shelf chiplets. However, due to lack of a universal standard for chiplet interfaces, and connections, this has not yet been practical and achievable. In addition, people have often depended on complex and expensive advanced packaging structures (e.g., large silicon interposers) to build their large SiPs. A new chiplet PHY technology that provides high performance (high bandwidth/power efficiency and low latency) over standard organic package substrates is presented. In addition, an innovative interfacing product that converts any chiplet interface to the new PHY enables practical mix and match of chiplets with different die-to-die interfaces and in different processes. The combined solution not only enables mixing and matching of chiplets, but also provides such option over standard packaging, reducing the total cost of the solution.

Eliyan

Eliyan Corporation, credited for the invention of the semiconductor industry’s highest-performance and most efficient interconnect on multi-die architectures, is leading the chiplet revolution by enabling the creation of ultimate chiplet systems. Its technology addresses the fundamental challenges with semiconductor scaling to meet the needs of high-performance computing applications, from desktop to datacenter. It has developed a breakthrough method to enable the industry’s highest performing interconnect for homogenous and heterogenous multi-die architectures, enabling increased sustainability through reduction in costs, manufacturing waste and power consumption. The company’s Bunch of Wires (BoW) PHY, invented by founder Ramin Farjadrad and proven to increase performance by 2x and reduce power in half, provides a more efficient approach to developing chiplet-based architectures. The company has received initial funding from strategic investors, including Intel Capital and Micron Ventures, and venture capital firms Tracker Capital Management and Celesta Capital. It is based in Santa Clara, California.